Meta Hiring Design Verification Engineer – Apply Now
Meta’s Infra Silicon team is working on cutting-edge ASIC (Application-Specific Integrated Circuits) and System on Chips (SoCs) that power Meta’s data centers. These chips help run AI/ML workloads, video transcoding, and high-performance computing tasks with maximum efficiency and minimum energy usage.
The team collaborates across different areas like architecture, design, verification, prototyping, and backend engineering to deliver world-class hardware solutions.
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This is a great opportunity for candidates passionate about chip design, hardware verification, and silicon innovation to start their career at Meta.
📋 Job Quick Info
| Field | Details |
|---|---|
| Company | Meta |
| Role | Design Verification Engineer |
| Team | Infra Silicon |
| Qualification | B.E/B.Tech in ECE/EEE/CS/VLSI (M.E/M.Tech preferred) |
| Skills Needed | C/C++, SystemVerilog/UVM, EDA tools, Python/TCL/Perl/Shell |
| Experience | IP Verification, Debugging RTL, SoC/CPU/GPU knowledge |
🔹 Key Responsibilities
- Develop and execute functional tests as per verification plans.
- Ensure DV closure using test plan coverage, functional coverage, and code coverage.
- Debug and resolve design failures in collaboration with design/architecture teams.
- Work closely with cross-functional teams like Design, Emulation, and Silicon Validation.
✅ Minimum Qualifications
- Bachelor’s degree (or in process) in Electronics Engineering, Computer Engineering, Computer Science, or VLSI.
- Experience with C/C++ or constrained-random verification techniques.
- Knowledge of IP block verification using standard DV methods.
- Familiarity with EDA tools and scripting (Python, TCL, Perl, Shell).
- Understanding of at least one area: CPU, GPU, networking, interconnects, fabrics.
⭐ Preferred Qualifications
- Ability to debug RTL-level failures with tools like Verdi.
- Knowledge of Git/Mercurial/SVN version control.
- Experience in CPU/GPU verification environments.
- Master’s degree in ECE/EEE/CS/VLSI (preferred).
- Hands-on experience with SystemVerilog/UVM environments.
- Exposure to peripheral IPs (UART, SPI, I2C) and protocols like APB, AXI.
🌍 About Meta
Meta is building the next generation of social technology. Starting with Facebook in 2004, the company expanded into Messenger, Instagram, and WhatsApp, reaching billions worldwide.
Today, Meta is shaping the future of digital interaction with augmented reality (AR), virtual reality (VR), and AI-powered computing systems. By joining Meta, you become part of a team that defines the future of connectivity and computing.
⚖️ Equal Opportunity Employer
Meta is an Equal Employment Opportunity (EEO) employer. The company does not discriminate based on race, gender, age, disability, religion, or other legally protected categories. Reasonable accommodations are available for applicants with disabilities.
📌 How to Apply
Interested candidates can apply online for the Design Verification Engineer role at Meta through the official career portal.